Analog Research Groups

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  • Texas AM AMSC ; amsc.tamu.edu
    
    
  • Georgia Tech Analog Consortium ; ece.gatech.edu/research/GTAC/
    
    
  • Caltech High-Speed ICs ; chic.caltech.edu/
    
    
  • Berkeley Wireless Research Center ; bwrc.eecs.berkeley.edu
    
    
  • Iowa State ; vlsi.ece.iastate.edu
    
    
  • Stanford VLSI Research Group ; mos.stanford.edu
    
    
  • Stanford Integrated Circuits Laboratory cis.stanford.edu
    
    
  • Stanford Concurrent VLSI Architecture ;cva.stanford.edu
    
    
  • Stanford SMIrC Laboratory; smirc.stanford.edu
    
    
  • Berkeley Jan M. Rabaey ;bwrc.eecs.berkeley.edu
    
    
    
    
    
    
    
    
    
  • Berkeley Wireless Research Center (http://bwrc.eecs.berkeley.edu)
    
    
  • Stanford Microwave Integrated Circuits Laboratory (http://www-smirc.stanford.edu)
    
    
  • AsadAbidi Research Group(UCLA http://www.icsl.ucla.edu)
    
    
  • Behzad Razavi Research Group (UCLA http://www.ee.ucla.edu/faculty/bios/razavi.htm)
    
    
  • Georgia Tech Analog Consortium (GTAC http://www.ece.gatech.edu/research/GTAC/)
    
    
  • Caltech High-speed Integrated Communications Group http://chic.caltech.edu
    
    
  • Texas AM University (http://amsc.tamu.edu )
    
    
  • Berkeley Analog IC Research Group ; kabuki.eecs.berkeley.edu
    
    
  • UCLA Research Centers; ee.ucla.edu
    
    
  • UCLA Asad Abidi's Group; icsl.ucla.edu
    
    
  • UCLA Razavi's CCLab ; ee.ucla.edu/~razavi/
    
    
  • UC Davis Electronic Circuits Research; ece.ucdavis.edu
    
    
  • Columbia Integrated Systems Laboratory ; cisl.columbia.edu/
    
    
  • University of Toronto Electronics Group; eecg.utoronto.ca
    
    
  • UMN Analog Groups; ee.umn.edu
    
    
  • WPI Microelectronics Group ; wpi.edu
    
    
  • UTD James R. Hellums; utd.edu
    
    
  • UTD Dr. Hoi Lee ; utdallas.edu
    
    MOSFET papers free download
    /bsim3v3manual.pdf"> BSIM3v3 Manual, (Final Version), Yuhua Cheng, Mansun Chan, Kelvin Hui, Min-chie Jeng, Zhihong Liu, Jianhui Huang, Kai Chen, James Chen, Robert Tu, Ping K. Ko, Chenming Hu Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720, from http://www-device.eecs.berkeley.edu/~bsim3/ftpv330/Mod_doc/b3v33manu.tar, merged into one with complete bookmarks
    
    
  • MOS Scaling: Transistor Challenges for the 21st Century, Scott Thompson, Paul Packan, Mark Bohr, Intel Corp.
    
    
  • Planet Analog Oct 24, 2000 (7:36 AM)
    
    
  • Compact Modeling of Drain and Gate Current Noise for RF CMOS, , R. van Langevelde et al., IEDM 2003 Technical Digest, pp. 867-870, 2003 (259kB).
    
    
  • Noise Modeling for RF CMOS Circuit Simulation , A.J. Scholten et al., IEEE Trans. Electron Devices, Vol. ED-50, pp. 618-632, 2003 (810kB).
    
    
  • Compact Modeling of Drain and Gate Current Noise for RF CMOS , A.J. Scholten et al., IEDM 2002 Technical Digest, pp. 129-132, 2002 (442kB).
    
    
  • Gate current: Modeling, DL extraction and impact on RF performance , R. van Langevelde et al., IEDM 2001 Technical Digest, pp. 289-292, 2001 (265kB).
    
    
  • RF-CMOS performance trends , P.H. Woerlee et al., IEEE Trans. Electron Devices, Vol. ED-48, pp. 1776-1782, 2001 (160kB).
    
    
  • RF-Distortion in deep sub-micron CMOS technologies , R. van Langevelde et al., IEDM 2000 Technical Digest, pp. 807-810, 2000 (259kB).
    
    
  • Efficient parameter extraction techniques for a new surface-potential-based MOS model for RF applications , W. Liang et al., Proceedings ICMTS 2001, pp. 141-145, 2001 (327kB).
    
    
  • Accurate thermal noise model for deep sub-micron CMOS , A.J. Scholten et al., IEDM 1999 Technical Digest, pp. 155-158, 1999 (264kB).
    
    
  • Accurate drain conductance modeling for distortion analysis in MOSFETs , R. van Langevelde and F.M. Klaassen, IEDM 1997 Technical Digest, pp. 313-317, 1997 (362kB).
    
    
  • Effect of gate-field dependent mobility degradation on distortion analysis in MOSFET's , R. van Langevelde and F.M. Klaassen, IEEE Trans. Electron Devices, Vol. ED-44, pp. 2044-2052, 1997 (264kB).
    
    
  • 90 nm Node CMOS Technology Comparison between INTEL Corporation and SAMSUNG Electronics , Min Chin Chai, 2003, http://shay.ecn.purdue.edu/~ee612/2003fp/Chai612.pdf.
    
    
  • The transistor, with emphasis on its use for radio frequency telecommunication. , Linköping Studies in Science and Technology. Dissertation No. 508, 1998. Presented at LiTH, February 13, 1998.
    
    
  • MOSFET LF noise under Large Signal Excitation: Measurement, Modelling and Application , Wel, A.P. van der, PhD thesis, University of Twente, 2005 http://purl.org/utwente/fid/2951.pdf
    
    
  • Advanced Model and Analysis of Series Resistance for CMOS Scaling Into Nanometer Regime—Part II: Quantitative Analysis, Seong-Dong Kim, Cheol-Min Park and Jason C. S. Woo, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 3, MARCH 2002