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Nanoscale System Design Challenges: Business as Usual?
High-Speed A/D Converters for Telecom Applications
How Fast Can You Go? Efficient Design Methods for RF Transceivers at 5 GHz and Beyond
Microelectronics Meets Biology: Challenges and Opportunities for Functional Integration in Lab-on-a-Chip
Future Trend of Microprocessor Design
Power Aware Wireless Microsensor Systems
Ultra Low-Power Multimedia Processor for Mobile Multimedia Applications

System-on-a-Chip Platforms
A Heterogeneous Multi-Core Platform for Low Power Signal Processing in Systems-on-Ohip
Implementation of a 256-bit WideWord Processor for the Data-Intensive Architecture (DIVA) Processing-In-Memory (PIM) Chip
An Approach for a Flexilble Interface Platform

VCO Techniques
A High-Stability, Ultra-Low-Power Quartz Differential Oscillator Circuit for Demanding Radio Applications
C02.02 – 18 GHz and 7 GHz Superharmonic Injection-Locked Dividers in 0.25µm CMOS Technology

Locating Imagers
A Single-Chip 10,000 Frames/s CMOS Tracking Image Sensor for Complex Targets
A Smart Position Sensor with Row Parallel Position Detection for High Speed 3-D Measurement
Smart Sensor Architecture for Real-Time High-Resolution Range Finding

Low-Power, Low-Voltage Circuits
Reliable Handling of Fempto-Ampere Currents in Standard CMOS
A CMOS Adaptive Interference Reduction System for Nerve Cuff Recordings
A New Correlated Double Sampling (CDS) Technique for Low Voltage Design Environment in Advanced CMOS Technology

Advanced Memory Techniques
The Millipede, a Very Dense, Highly Parallel Scanning Probe Data Storage System (Session Invited Paper)
Planar 1T-Cell DRAM with MOS Storage Capacitors in a 130nm Logic Technology for High Density Microprocessors Caches
A 0.13-µm CMOS NOR Flash Memory Experimental Chip for 4-b/cell Digital Storage

VCO and Resonator Techniques
A 6.7-fF/µm 2 Bias-Independent Gate Capacitor (BIGCAP) with Standard CMOS Process and Its Application to the Loop Filter of a Differential PLL
Linear Controlled Temperature Independent Varactor Circuitry
A 2.6 GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors
A 300-Microwatt 1.9GHz CMOS Oscillator Utilizing Micromachined Resonators

Short Range Radio and Advanced RF Techniques
A 24GHz CMOS Front-End
28 GHz Active I/Q Mixer with Integrated QVCO in SiGe Bipolar Technology
A 5GHz BiCMOS RFIC Front End for IEEE 802.11a/HiperLAN Wireless LAN
Transceiver Front-End with Integrated TX/RX Commutator for Bluetooth Applications
A 150/400/800/1900 MHz Low Noise Cartesian Feedback IC with Programmable Loop Bandwidth

Operational Amplifiers
A 1.2V, 200µW Rail-to-Rail OpAmp with 90dB THD using Replica Gain Enhancement
Constant-gm Rail-to-Rail Input/Output Op-Amp for Video Applications
250 MHz CMOS Rail-to-Rail IO OpAmp: Structural Design Approach
A 250+dB Open Loop Gain Feedforward Compensated High Precision Operational Amplifier
A Low-Voltage Fully Balanced OTA with Common Mode Feedforward and Inherent Common Mode Feedback Detector

Novel Digital Design Approaches
Fast Signal Propagation for Point to Point On-Chip Long Interconnects Using Current Sensing
Wire Self-Heating in Supply Lines on Bulk-CMOS ICs
A Dual-Rail PLA with 2-Input Logic Cells
A Slew Rate Controlled Output Driver Using PLL as Compensation Circuit
Energy-Delay Tradeoffs in Combinational Logic Using Gate Sizing and Supply Voltage Optimization

Optical Communication Circuits
A 15 Gb/s 4:1 Parallel-to-Serial Data Multiplexer in 120nm CMOS
A Low-Power 20-Gb/s CMOS 2:1 Multiplexer/Driver
A CMOS 7-Gb/s Power-Efficient 4-PAM Transmitter
A 4-Gb/s Clock and Data Recovery Circuit Using Four-Phase 1/8-Rate Clock
Analog Timing Recovery for a Noise-Predictive DFE

Low-Power ADCs
A 0.5V, 1µW Successive Approximation ADC
A 10-Bit Charge-Transfer Amplifier-Based A/D Converter with 400-µW/MSPS Dynamic Power Dissipation
An Ultra-Low Power ADC for Distributed Sensor Networks
A Low-Power 16-channel AD Converter and Digital Processor ASIC

Circuits and Modeling in SOI
A Novel Sub-1 V High Speed Circuit Design Technique in Partially Depleted SOI-CMOS Technology with Ultra Low-Leakage Power
Sense-Amplifierless DCSL: A Circuit Style Tolerant to Floating Body Effects in PD/SOI
An Accurate Estimation Model for Subthreshold CMOS SOI Logic

Continuous-Time Sigma-Delta Converters
C14.01 – A Versatile 1.75mW CMOS Continuous-Time Delta-Sigma ADC with 75dB Dynamic Range for Wireless Applications
C14.02 – A 5mW, 100kHz Bandwidth, Current-Mode Continuous-Time Sigma-Delta Modulator with 84 dB Dynamic Range
A Continuous-Time Sigma-Delta Modulator with Reduced Jitter Sensitivity

System-on-a-Chip Issues
Modeling and Experimental Verification of Substrate Noise Generation in a 220KGates WLAN System-on-Chip with Multiple Supplies
Dynamic Hot Spot Temperature Sensing in Smart Power Switches
Reducing Substrate Coupling in 10 to 40 Gbit/s High-Gain Broadband Amplifiers

High-Speed Amplifiers
Multi-Pole Bandwidth Enhancement Technique for Transimpedance Amplifiers
A 270MHz, 1 Vpk-pk, Low-Distortion Variable Gain Amplifier
A 15mW 280MHz 80dB Gain CMOS Limiting/Logrithmic Amplifier with Active Cascode Gain-Enhancement

System-on-a-Chip Applications
High-Performance, Low-Power, and Leakage-Tolerance Challenges for Sub-70nm Microprocessor Circuits (Session Invited Paper)
Adaptive PRML Core Development for SoC CD/DVD Multi Controller IC
A Single-Chip Speech Recognition System with Embedded Flash Memory and Configurable Data Path
A Highly Flexible, Module-based SoC-Approach for VoIP-Applications

Imagers
Fully-Integrated Active-Quenching Circuit for Single-Photon Detection
CMOS Active Differential Imaging Device with Single In-Pixel Analog Memory
A Switched-Capacitor Variable Gain Amplifier for CCD Image Sensor Interface System
VISoc: a Smart Camera SoC
A CMOS Analog Parallel Array Processor Chip with Programmable Dynamics for Early Vision Tasks

Digital Circuit Techniques
C21.02 – A Low Power Symmetrically Pulsed Dual Edge-Triggered Flip-Flop
A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards
Self-Precharging Flip-Flop (SPFF): A New Level Converting Flip-Flop
A Self-Controllable-Voltage-Level (SVL) Circuit for Low-Power, High-Speed CMOS Circuits

RF Circuits and Components
A 0.7dB Insertion Loss CMOS-SOI Antenna Switch with More than 50dB Isolation over the 2.5 to 5GHz Band
MEMS Variable Capacitor versus MOS Variable Capacitor for a 5GHz Voltage Controlled Oscillator
Influence of the MOS Varactor Gate Doping on the Performance of a 2.7GHz-4GHz LC-VCO in Standard Digital 0.12µm CMOS Technology

Optical Communication Circuits
Generic and Intelligent CMOS 155 Mb/s Burst Mode Laser Driver Chip Design and Performance
A Monolithic 4×4 TIA, Crosspoint Switch and Laser Driver IC with Very High Programming Speed
A 20 Mbit/s Integrated Photoreceiver with Digital Outputs in 0.6µm CMOS Technology

High-Power, High-Voltage Circuits
A High-Speed Monolithic Amplifier for CRT Drivers in SOI
An Integrated 200W Class D Audio Amplifier
A Novel Coding Topology for Digital Class-D Audio Power Amplifiers with Very Low Pulse-Repetition Rate

Digital Communications
A High Speed Reed-Solomon Decoder Chip Using Inversionless Decomposed Architecture for Euclidean Algorithm
500 Mb/s Soft Output Viterbi Decoder
Direct Digital Frequency Synthesizers using First-Order Polynomial Chebyshev Approximation University of Naples
Real Time Implementation on FPGA of an OFDM Based Wireless LAN Modem Extended with Adaptive Loading

RF VCOs
Microstrip Coupled VCOs for 40-GHz and 43-GHz OC-768 Optical Transmission
A Low-Phase-Noise 5GHz Quadrature CMOS VCO Using Common-Mode Inductive Coupling
An Integrated 10/5GHz Injection-Locked Quadrature LC VCO in a 0.18µm Digital CMOS Process
A Wide-Tuning Range Transfomer-Based RF CMOS Oscillator
Fully Integrated 5GHz CMOS VCOs with On Chip Low Frequency Feedback Circuit for 1/f Induced Phase Noise Suppression

Wireline Communication Circuits
Driving the DSL Highway : High Speed, High Density, Low Power, Low Cost (Session Invited Paper)
A DMT-Based VDSL Receiver Front-End Design in 0.35µm BiCMOS
A Frequency Division Duplexing DMT-Based Modem Tranceiver for VDSL
A 2V Low-Power CMOS 125Mbaud Repeater Architecture for UTP5 Cables

Sigma-Delta A/D Converters
A 10.7MHz Self-Calibrated SC Multibit 2nd-Order Bandpass Sigma-Delta Modulator
A Second Order Sigma Delta Modulator Using Semi-Uniform Quantizer with 81dB Dynamic Range at 32x OSR
A 14-Bit Delta-Sigma Modulator for ADSL-CO Applications in 0.18µm CMOS
Ultra Low-Voltage MOSFET-Only Switched-Opamp Sigma-Delta Modulators Using Depletion-Mode MOS-Capacitors
A 10MHz IF Digitizer Using a Novel Quadrant Based Swapping Scheme for I, Q Mismatch Elimination that Achieves an Equivalent 65dB Image Rejection Ratio

System-on-a-Chip Implementations
Design of an On-Chip Random Number Generator Using Metastability
Expandable High Throughput Vector Based Access Memory Architecture
Globally Updated Mesochronous Design Style
A Clock Tuning Circuit for System-on-Chip